1. Technical Field
This invention relates to an FEC structuring method and an FEC multiplexer, designed to realize long-haul and large-capacity transmission by correcting a bit error caused by the degradation of optical SNR based on forward error correction (FEC) in an optical transmission system.
2. Background Art
FIG. 1 is a schematic diagram showing a conventional FEC multiplexer, for example one presented in accordance with ITU-T Recommendation G.975. In the drawing, a reference numeral 1 denotes a first demultiplexing circuit for demultiplexing 2.5 Gbit/s STM-16 data into 16 parallel 156 Mbit/s data; and 2 a second demultiplexer for demultiplexing the 16 parallel 156 Mbit/s data into 128 parallel 19 Mbit/s data. A reference numeral 3 denotes a first speed conversion circuit for adding redundant information and overhead information regions to the 128 parallel 19 Mbit/s data, and increasing a transmission speed to 21 Mbit/s by an amount accommodating the addition of the redundant information and overhead information regions; and 4 an overhead insertion circuit for inserting overhead information, e.g., frame alignment information, necessary for the operation and maintenance of the optical transmission system, into the overhead information region. A reference numeral 5 denotes an RS (255,239) coding circuit, represented by Reed-Solomon (RS) code, for generating error correction codes for the overhead information and the STM-16 data, and storing redundant information thereof in the redundant information region; 6 a first multiplexer for multiplexing the STM-16 data having the overhead information and the error correction codes added thereto into 16 parallel 167 Mbit/s data; and 7 a second multiplexing circuit for multiplexing the 16 parallel 167 Mbit/s into 2.66 Gbit/s FEC frame.
A reference numeral 8 denotes a third demultiplexing circuit for demultiplexing the 2.66 Gbit/s FEC frame, which has been multiplexed by the second multiplexing circuit 7 and transmitted through an optical transmission path, into 16 parallel 167 Mbit/s data: and 9 a fourth demultiplexing circuit for demultiplexing the 16 parallel 167 Mbit/s data into 128 parallel 21 Mbit/s data. A reference numeral 10 denotes a frame alignment circuit for detecting the head position of the 128 parallel 21 Mbit/s data according to the overhead information of the overhead information region added to the 128 parallel 21 Mbit/s data; and 11 an RS (255,239) decoding circuit for decoding the 128 parallel 21 Mbit/s data, detecting a data error in the FEC frame according to the decoding of the error correction codes and correcting the data into original correct data. A reference numeral 12 denotes an overhead separation circuit for separating the overhead information from the overhead information region of the 128 parallel 21 Mbit/s data; 13 a second speed conversion circuit for eliminating the redundant information and overhead information regions from the 128 parallel 21 Mbit/s data, and reducing a transmission speed to 19 Mbit/s by an amount accommodating the elimination of the redundant information and overhead information regions; 14 a third multiplexing circuit for multiplexing the 128 parallel 19 Mbit/s data to 16 parallel 156 Mbit/s data; and 15 a fourth multiplexing circuit for multiplexing the 16 parallel 156 Mbit/s data into 2.5 Gbit/s STM-16 data.
In FIG. 1, the first demultiplexing circuit 1 demultiplexes 2.5 Gbit/s ASTM-16 data into 16 parallel 156 Mbit/s. The second demultiplexing circuit 2 demultiplexes the 16 parallel 156 Mbit/s data into 128 parallel 19 Mbit/s data. The first speed conversion circuit 3 adds redundant information and overhead information regions to the 128 parallel 19 Mbit/s data, increases a transmission speed by an amount accommodating the addition of the redundant information and overhead information regions, and converts the data into 128 parallel 21 Mbit/s data. The overhead insertion circuit 4 inserts overhead information, e.g., frame alignment information or the like, necessary for the operation and maintenance of the optical transmission system, into the overhead information region. The RS (255,239) coding circuit 5 generates error correction codes for the overhead information and the STM-16 data, and stores the redundant information thereof in the redundant information region. The first multiplexing circuit 6 multiplexes the overhead information and the STM-16 data having the redundant information added thereto into 16 parallel 167 Mbit/s data. Further, the second multiplexing circuit 7 multiplexes the 16 parallel 167 Mbit/s data into a 2.66 Gbit/s FEC frame, and transmits the data to the optical transmission path.
The third demultiplexing circuit 8 demultiplexes the 2.66 Gbit/s FEC frame obtained by the multiplexing carried out by the second multiplexing circuit 7 and transmitted through the optical transmission path, into 16 parallel 167 Mbit/s data. Then, the fourth demultiplexing circuit 9 demultiplexes the 16 parallel 167 Mbit/s data into 128 parallel 21 Mbit/s data. The frame alignment circuit 10 detects the head position of the 128 parallel 21 Mbit/s data according to the overhead information of the overhead information region added to the 128 parallel 21 Mbit/s data. The RS (255,239) decoding circuit 11 decodes the 128 parallel 21 Mbit/s data, detects data errors in the FEC frame according to the decoding of the error correction circuit using the added redundant information, and corrects the data into original correct data. The overhead separation circuit 12 separates the overhead information from the overhead information region of the 128 parallel 21 Mbit/s data. The second speed conversion circuit 13 erases the redundant information and overhead information regions from the 128 parallel 21 Mbit/s data, reduces a transmission speed to 19 Mbit/s by an amount accommodating the erasure of the redundant information and overhead information regions. The third multiplexing circuit 14 multiplexes the 128 parallel 19 Mbit/s into 16 parallel 156 Mbit/s data. Then, the fourth multiplexing circuit 15 multiplexes the 16 parallel 156 Mbit/s data into 2.5 Gbit/s STM-16 data.
FIG. 2 is a structural view showing an FEC frame outputted from the overhead insertion circuit. FIG. 3 is a structural view showing FEC frames outputted from the RS (255,239) coding circuit and the second multiplexing circuit.
As shown in FIG. 2, the FEC frame outputted from the overhead insertion circuit 4 is structured of subframes 1 to 128 including 1 byte of overhead information, 238 bytes of STM-16 data, and a 16 bytes of RS (255,239) redundant information. As shown in FIG. 3, by the RS (255,239) coding circuit 5, error correction coding is executed for every 8 subframes. For example, in the subframes 1 to 8, redundant information symbols ER0-0 to ER0-15 are computed for the overhead information and the STM-16 data, and stored in the 16-bit RS (255,239) redundant information region. In addition, the FEC frame outputted from the second multiplexing circuit 7 is generated by sequentially multiplexing the subframes 1 to 128.
Here, f is a given natural number, indicating the number of times of multiplexing for each of the redundant information symbols ER0-0 to ER0-15. In each of FIGS. 2 and 3, the example of f=16 is shown.
In the described FEC frame, the FEC frame outputted from the second demultiplexing circuit 2 is 238 bytes of STM-16 data. By the first speed conversion circuit 3, the overhead and redundant information regions composed of 1 byte of overhead information and 16 bytes of RS (255,239) redundant information is added, and a transmission speed is increased by an amount accommodating the addition of the redundant information and overhead information regions. Accordingly, the transmission speed is increased by 255/238 times more than that of the original STM-16 data, and the transmission speed of the FEC frame is changed from 2.5 Gbit/s to 2.6 Gbit/s.
The FEC frame having the foregoing structure enables bit errors to be corrected. Thus, despite an optical transmission system having degraded optical SNR, a high-quality service can be provided. It is therefore possible to build a long-haul or large-capacity optical transmission system.
In the FEC frame structure shown in each of FIGS. 2 and 3, by shortening the STm-16 data in the subframe from 238 bytes to 110 bytes, and setting RS (255,239) error correction coding to be RS (127,111) error correction coding, a ratio of error correction coding to target information is increased. Thus, it is possible to enhance an error correction capability.
Since the conventional FEC frame structuring method and FEC multiplexer are constructed in the foregoing manner, if the transmission distance of the optical transmission path is long, or if the number of wavelengths is increased in a wavelength multiplexing system, optical SNR is greatly degraded. To compensate for this degradation, correction capacity can be increased to a certain extent, for example by increasing the ratio of error correction code to original information. However, the increased ratio of the error correction code to the original information necessitates a further increase in the transmission speed by the first speed conversion circuit 3. For example, in the RS (127,111) error correction coding, the transmission speed of the FEC frame is 2.89 Gbit/s, larger by 127/110 times than that of STM-16 data set to 2.5 Gbit/s, increasing the degradation amount of an optical transmission characteristic. Thus, even when the ratio of the error correction code to the original information was increased, it was impossible to build a long-haul and large-capacity optical transmission system having a predetermined quality.
The present invention was made to solve the foregoing problems. Objects of the invention are to provide an FEC frame structuring method and an FEC multiplexer, capable of increasing a transmission speed even when a ratio of an error correction code to information is increased, and greatly enhancing an error correction capability even when the degradation amount of an optical transmission characteristic is increased.